Noise Reduction by Pixel Circuit Optimization in 4-T Pixel Structure Detectors Using Integrated Circuit Technologies (1019)

Charged Coupled Devices (CCD), in the application of imaging, exhibits excellent noise performance. However this technology lacks in integration capability with silicon electronics. Integrated circuit technology presents attractive features to detector development. However noise performance lacks comparing to CCD detectors. In this work, the 4-T pixel structure detector will be implemented with the double gate device concept. This improves the noise performance and hence overall performance.