CMOS Phase Frequency Detector and Charge Pump for Multi-Standard Frequency Synthesizer (1131)

An improved phase frequency detector (PFD) and a novel charge pump (CP) for phase locked loop (PLL) applications are presented. The mechanisms for widening the phase error detection range and eliminating the dead zone are applied in the proposed PFD. To maintain a stable loop bandwidth for multi-standard frequency synthesizer applications, a programmable structure is developed in the proposed CP. Implemented by 0.18μm CMOS process, the power consumption is 2.3mW under a 1.8V supply.