GUIDED GROWTH OF CdS NANOWALLS WITH CONTROLLED ORIENTATIONS FOR HIGH-PERPORMANCE NANO-MISFETS AND PHOTODETECTORS

Controlled alignment of semiconductor nanostructures plays key roles for large-scale integrated functional nanodevices. Here we present the horizontally guided growth of CdS nanowalls with controlled crystallographic orientations on both flat and faceted sapphires by a simple thermal evaporation route. HRTEM, GPA and micro-PL analyses confirmed the high single-crystal quality of these nanowalls. On the basis of these horizontally self-aligned nanowalls arrays, nano-MISFETs and photodetectors arrays were conveniently fabricated in a wafer scale (cm²) and high-performances were achieved. Most of the nano-MISFETs work in a E-mode (normally off) with on/off current ratio of 10⁸ and a highest transconductance of 1.1 µS. The on/off ratio is four orders of magnitude higher than the best reported results for E-mode CdS nano-FETs. The best rise and fall time of the photodetectors is ~1 µs and the 3-dB bandwidth is ~350 kHz, which is one order of magnitude faster than the best results reported so far. Therefore, the present route holds promising to develop large-scale fabrication of high-performance semiconductor nanodevices.