A Patterning Strategy for Large Area Arrays of High Density Nanostructures

This work presents a method to implement high density arrays of nanostructures at wafer level, based on the co-optimization of the layout design, the electron beam lithography, the intermediate hard mask and the final etching process as strategy to deliver a production-worthy patterning solution. Main goal is the reduction of inherent complexity of electron beam lithography step by introducing an intermediate hard mask to achieve, through the fabrication process, separate control of part of the pattern parameters, easing requirements on the lithography side.

Rather than using electron beam lithography to directly obtain the shape and size required for the mask, which results in unaffordable exposure times for complex geometries (particularly with curved shapes in large patterns), a simplified electron beam lithography step has been developed to obtain a primary resist mask with the required shape and periodicity, but smaller size. The exposure time optimization has been achieved with a proper layout design (single shape square approximation) to reduce the complexity of shapes to be exposed. The electron beam exposure conditions (pixel size, current, dose, mbsbase…) were selected to minimize the total exposure time, while allowing the achievement of a resist mask size suitable for next process steps.

Pattern on primary resist mask is transferred, by an etch process, to a secondary hard mask material deposited on the substrate. After resist removal, size of mask features is fine-tuned using a deposition and etch-back process with same hard mask material, which allows a controlled growth of features attained with primary mask. This work illustrates the growth process and the effect of key parameters (thickness of SiO₂ layers, over-etch times…) on a SiO₂ hard mask intended to generate a 110mm diameter area with a hexagonal lattice of circular structures distributed in 1 mm pitch with a diameter of 500 nm using DRIE.