COSPAR 2019

FPGA implementation for high throughput small satellite applications

Jagannath Paudyal 2 Sunita Parajuli 1
1Geography, Tribhuvan University, kathmandu, bagmati, Nepal
2Engineering, Tribhuvan University, kathmandu, bagmati, Nepal

Generally, various kinds of processors and microcontrollers with highly optimized software solutions are in practice in small satellites.But even with modern high speed signal processors, some intensive error correcting and digital filtering algorithms are too much for them. For that, ASIC solution has also been practiced, but comes with the cost of being non-reconfigurable and expensive. FPGAs on the other hand has least of these caveats. By computing such intensive tasks in parallel and pipelined fashion using every clock more efficiently we can significantly increase the throughput maintaining low power. Modern FPGAs also supports rapid dynamic partial reconfiguration which with careful design can even outperform ASICs in some cases. This poster illustrates the high performance, low power, high radiation tolerance property of FPGA to implement in any satellite requiring high throughput such as measuring high-resolution cloud dynamics.

Jagannath Paudyal
Jagannath Paudyal
Royal Nepal Academy in Science and Technology








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