The role of ultra high vacuum in the growth of ultra-thin layers in semiconductor devices

Industrial applications of new electronic devices are driving nanotechnology toward the design and manufacturing of ultra-thin films that are both more efficient and lower in cost than their predecessors. Devices such as those used in quantum computing, 2D materials, and organometallic compounds require manufacturing systems that provide the optimum environment for growth. Interfacial boundaries and substrate properties play crucial roles in optimizing band-to-band tunneling, spin-orbit coupling, and electron-hole transport in the synthesis of such devices.

One of the key factors is providing cluster or linear Ultra high vacuum laboratory solutions that couple various growth and analysis technologies in one environment without breaking the vacuum. Clean wafers are introduced into a UHV environment, and sample annealing and preparation are provided before the wafer begins a sequence of steps that will allow precise engineering of each layer in one platform. In the example of 2D TMD materials, cleaned Silicon or Sapphire substrates were annealed up to 1000◦C for 1h to smoothen the surface within the Vinci Technologies preparation chamber. After the preparation process, the sapphire surface is expected to be chemically inert with an Oxygen-Aluminum plane polarity. Lattice defects are reduced due to the ability to influence the growth rate and the ratio of species of source materials present at the substrate interface. Samples are transported to the Molecular Beam Epitaxy system where they can be grown layer by layer resulting in flat surfaces with a smooth interface for engineered heterostructures. Transition metals such as Mo, W, and Pt can be bonded with chalcogenide elements such as Se, Te, or S to achieve monolayer films of direct bandgap which is of particular interest for flexible electronics, photovoltaics, and memory devices. In the following presentation, we will highlight the different growth and analysis technology with regard to device engineering.